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CONCUR
2006
Springer
13 years 10 months ago
Weak Bisimulation Up to Elaboration
Abstract We study the use of the elaboration preorder (due to ArunKumar and Natarajan) in the framework of up-to techniques for weak bisimulation. We show that elaboration yields a...
Damien Pous
LCPC
2001
Springer
13 years 11 months ago
Bridging the Gap between Compilation and Synthesis in the DEFACTO System
Abstract. The DEFACTO project - a Design Environment For Adaptive Computing TechnOlogy - is a system that maps computations, expressed in high-level languages such as C, directly o...
Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoun...
ERSA
2007
194views Hardware» more  ERSA 2007»
13 years 8 months ago
A Scalable and Reconfigurable Shared-Memory Graphics Cluster Architecture
Abstract: If the computational demands of an interactive graphics rendering application cannot be met by a single commodity Graphics Processing Unit (GPU), multiple graphics accele...
Ross Brennan, Michael Manzke, Keith O'Conor, John ...
EUROPAR
2006
Springer
13 years 10 months ago
COPRA - A Communication Processing Architecture for Wireless Sensor Networks
Abstract. Typical sensor nodes are composed of cheap hardware because they have to be affordable in great numbers. This means that memory and communication bandwidth are small, CPU...
Reinhardt Karnapke, Jörg Nolte
DATE
2009
IEEE
104views Hardware» more  DATE 2009»
14 years 1 months ago
Programming MPSoC platforms: Road works ahead!
Abstract—This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. The current trend towards MPSoC platforms in most com...
Rainer Leupers, Andras Vajda, Marco Bekooij, Soonh...