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» Exploration of Area and Performance Optimized Datapath Desig...
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FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
14 years 1 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
14 years 2 days ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
EH
2004
IEEE
117views Hardware» more  EH 2004»
13 years 10 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
USS
2010
13 years 4 months ago
SEPIA: Privacy-Preserving Aggregation of Multi-Domain Network Events and Statistics
Secure multiparty computation (MPC) allows joint privacy-preserving computations on data of multiple parties. Although MPC has been studied substantially, building solutions that ...
Martin Burkhart, Mario Strasser, Dilip Many, Xenof...
SLIP
2006
ACM
14 years 28 days ago
The routability of multiprocessor network topologies in FPGAs
A fundamental difference between ASICs and FPGAs is that wires in ASICs are designed such that it matches the requirements of a particular design. Wire parameters such as: length...
Manuel Saldaña, Lesley Shannon, Paul Chow