59 search results - page 9 / 12 » Exploring Memory Hierarchy with ArchC |
ISSS
2000
IEEE
14 years 4 days ago
2000
IEEE
In data dominated applications, like multi-media and telecom applications, data storage and transfers are the most important factors in terms of energy consumption, area and syste...
ISCA
1993
IEEE
14 years 21 days ago
1993
IEEE
The distribution of resources among processors, memory and caches is a crucial question faced by designers of large-scale parallel machines. If a machine is to solve problems with...
EUROPAR
2006
Springer
14 years 7 days ago
2006
Springer
Abstract. This paper presents a study of performance optimization of dense matrix multiplication on IBM Cyclops-64(C64) chip architecture. Although much has been published on how t...
SAMOS
2005
Springer
14 years 2 months ago
2005
Springer
An analytical performance model for out of order issue superscalar micro-processors is presented. This model quantifies the performance impacts of micro-architecture design option...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...