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» Exploring the multiple-GPU design space
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ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
14 years 5 days ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...
SBACPAD
2006
IEEE
102views Hardware» more  SBACPAD 2006»
14 years 4 months ago
Ultra-Fast CPU Performance Prediction: Extending the Monte Carlo Approach
Performance evaluation of contemporary processors is becoming increasingly difficult due to the lack of proper frameworks. Traditionally, cycle-accurate simulators have been exte...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck
OOIS
2001
Springer
14 years 2 months ago
An Object-Oriented Framework for Developing Information Retrieval Applications
Abstract. Design and development of information retrieval IR systems is a complex and expensive process. In the process of building an IR system, developers need to explore a lar...
Joemon M. Jose, David G. Hendry, David J. Harper
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
14 years 7 months ago
Guaranteeing performance yield in high-level synthesis
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
Wei-Lun Hung, Xiaoxia Wu, Yuan Xie
CHI
2010
ACM
14 years 5 months ago
Layered elaboration: a new technique for co-design with children
As technology for children becomes more mobile, social, and distributed, our design methods and techniques must evolve to better explore these new directions. This paper reports o...
Greg Walsh, Allison Druin, Mona Leigh Guha, Elizab...