Sciweavers

41 search results - page 6 / 9
» Extended Norm-Trace Codes with Optimized Correction Capabili...
Sort
View
IOLTS
2006
IEEE
103views Hardware» more  IOLTS 2006»
14 years 1 months ago
Designing Robust Checkers in the Presence of Massive Timing Errors
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
Frederic Worm, Patrick Thiran, Paolo Ienne
IEEEPACT
1999
IEEE
13 years 11 months ago
Predicated Static Single Assignment
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
Lori Carter, Beth Simon, Brad Calder, Larry Carter...
CODES
2008
IEEE
14 years 1 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
FASE
2005
Springer
14 years 1 months ago
Termination Criteria for Model Transformation
Model Transformation has become central to most software engineering activities. It refers to the process of modifying a (usually graphical) model for the purpose of analysis (by i...
Hartmut Ehrig, Karsten Ehrig, Juan de Lara, Gabrie...
FLAIRS
2003
13 years 8 months ago
Incremental Breakout Algorithm with Variable Ordering
This paper presents the Incremental Breakout Algorithm with Variable Ordering (IncBA). This algorithm belongs to the class of local search algorithms for solving Constraint Satisf...
Carlos Eisenberg, Boi Faltings