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GLVLSI
2000
IEEE
90views VLSI» more  GLVLSI 2000»
14 years 28 days ago
Low power high speed analog-to-digital converter for wireless communications
A new ADC architecture is devised. This architecture is memory based, in which the last sample is used to predict the current one, resulting in both power dissipation and energy r...
A. E. Hussein, Mohamed I. Elmasry
ISCAS
1999
IEEE
115views Hardware» more  ISCAS 1999»
14 years 24 days ago
Novel high-radix residue number system multipliers and adders
Radix-r modulo rn multipliers and adders are introduced in this paper. The proposed architectures are shown to require several times less area than previously reported architectur...
Vassilis Paliouras, Thanos Stouraitis
CORR
2010
Springer
71views Education» more  CORR 2010»
13 years 6 months ago
Equality, Quasi-Implicit Products, and Large Eliminations
This paper presents a type theory with a form of equality reflection: provable equalities can be used to coerce the type of a term. Coercions and other annotations, including impl...
Vilhelm Sjöberg, Aaron Stump
IFIPTCS
2010
13 years 6 months ago
Polarized Resolution Modulo
We present a restriction of Resolution modulo where the rewrite rules are such that clauses rewrite to clauses, so that the reduct of a clause needs not be further transformed into...
Gilles Dowek
TCOM
2011
83views more  TCOM 2011»
13 years 3 months ago
Minimizing Sum-MSE Implies Identical Downlink and Dual Uplink Power Allocations
—Minimizing the sum of mean squared errors using linear transceivers under a sum power constraint in the multiuser downlink is a non-convex problem. Existing algorithms exploit a...
Adam J. Tenenbaum, Raviraj S. Adve