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ICCAD
2007
IEEE
87views Hardware» more  ICCAD 2007»
14 years 5 months ago
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
Philip Brisk, Ajay K. Verma, Paolo Ienne
CHI
2010
ACM
14 years 3 months ago
pCubee: a perspective-corrected handheld cubic display
In this paper, we describe the design of a personal cubic display that offers novel interaction techniques for static and dynamic 3D content. We extended one-screen Fish Tank VR b...
Ian Stavness, Billy Lam, Sidney Fels
ESOP
2009
Springer
14 years 3 months ago
Exploring the Design Space of Higher-Order Casts
This paper explores the surprisingly rich design space for the simply typed lambda calculus with casts and a dynamic type. Such a calculus is the target intermediate language of th...
Jeremy G. Siek, Ronald Garcia, Walid Taha
ICS
2009
Tsinghua U.
14 years 3 months ago
Adagio: making DVS practical for complex HPC applications
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
Barry Rountree, David K. Lowenthal, Bronis R. de S...
CCGRID
2009
IEEE
14 years 3 months ago
Resource Allocation Using Virtual Clusters
— We propose a novel approach for sharing cluster resources among competing jobs. The key advantage of our approach over current solutions is that it increases cluster utilizatio...
Mark Stillwell, David Schanzenbach, Fréd&ea...