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» Extending Platform-Based Design to Network on Chip Systems
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TC
2011
13 years 2 months ago
Maximizing Spare Utilization by Virtually Reorganizing Faulty Cache Lines
—Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Since a large fraction of chip area is devoted to on-...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
SAMOS
2005
Springer
14 years 1 months ago
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Chi...
Holger Blume, Thorsten von Sydow, Daniel Becker, T...
NOSSDAV
2005
Springer
14 years 1 months ago
A formal approach to design optimized multimedia service overlay
Service overlay networks have recently attracted tremendous interests. In this paper, we propose a new integrated framework for specifying services composed of service components ...
Hirozumi Yamaguchi, Khaled El-Fakih, Akihito Hirom...
ISQED
2009
IEEE
136views Hardware» more  ISQED 2009»
14 years 2 months ago
NBTI aware workload balancing in multi-core systems
—As device feature size continues to shrink, reliability becomes a severe issue due to process variation, particle-induced transient errors, and transistor wear-out/stress such a...
Jin Sun, Avinash Karanth Kodi, Ahmed Louri, Janet ...
RTSS
2007
IEEE
14 years 2 months ago
ANDES: An ANalysis-Based DEsign Tool for Wireless Sensor Networks
— We have developed an analysis-based design tool, ANDES, for modeling a wireless sensor network system and analyzing its performance before deployment. ANDES enables designers t...
Vibha Prasad, Ting Yan, Praveen Jayachandran, Zeng...