157 search results - page 24 / 32 » Extending Symmetry Reduction by Exploiting System Architectu... |
ISCA
2008
IEEE
14 years 2 months ago
2008
IEEE
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
CODES
2010
IEEE
13 years 5 months ago
2010
IEEE
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
FGCS
2006
13 years 7 months ago
2006
CSCL systems can benefit from using grids since they offer a common infrastructure enabling the access to an extended pool of resources that can provide supercomputing capabilitie...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Nested paging is a hardware solution for alleviating the software memory management overhead imposed by system virtualization. Nested paging complements existing page walk hardwar...