Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
Programs with irregular patterns of dynamic data structures and/or those with complicated control structures such as recursion are notoriously difficult to parallelize efficient...
Sheng Li, Amit Kashyap, Shannon K. Kuntz, Jay B. B...
—This paper extends the lifting-based motion threading technique from the frame-based coding to the object-based coding, attracted by the unique advantages of the object-based co...
Abstract— Parallel time-interleaved analog-to-digital converters (TIADCs) are an attractive architecture to realize low-power and high-speed data conversion. As a drawback of suc...
— A flexible transport stream processor for DTV which is also designed under cost-effective consideration is proposed in this paper. A RISC micro-controller is allocated as the ...