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ICCD
2008
IEEE
120views Hardware» more  ICCD 2008»
16 years 1 months ago
Near-optimal oblivious routing on three-dimensional mesh networks
— The increasing viability of three dimensional (3D) silicon integration technology has opened new opportunities for chip architecture innovations. One direction is in the extens...
Rohit Sunkam Ramanujam, Bill Lin
TEI
2010
ACM
128views Hardware» more  TEI 2010»
15 years 11 months ago
Texturing the "material turn" in interaction design
Advances in the creation of computational materials are transforming our thinking about relations between the physical and digital. In this paper we characterize this transformati...
Erica Robles, Mikael Wiberg
CC
2010
Springer
190views System Software» more  CC 2010»
15 years 11 months ago
Is Reuse Distance Applicable to Data Locality Analysis on Chip Multiprocessors?
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Xipeng She...
PPOPP
2010
ACM
15 years 10 months ago
Thread to strand binding of parallel network applications in massive multi-threaded systems
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
INFOCOM
2007
IEEE
15 years 10 months ago
A Performance Study of Deployment Factors in Wireless Mesh Networks
Abstract— We present a measurement-parameterized performance study of deployment factors in wireless mesh networks using three performance metrics: client coverage area, backhaul...
Joshua Robinson, Edward W. Knightly
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