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» FADIC: Architectural Synthesis applied in IC Design
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ASPDAC
2008
ACM
134views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Automatic re-coding of reference code into structured and analyzable SoC models
The quality of the input system model has a direct bearing on the effectiveness of the system exploration and synthesis tools. Given a well-structured system model, tools today are...
Pramod Chandraiah, Rainer Dömer
MEMOCODE
2007
IEEE
14 years 1 months ago
Scheduling as Rule Composition
Bluespec is a high-level hardware description language used for architectural exploration, hardware modeling and synthesis of semiconductor chips. In Bluespec, one views hardware ...
Nirav Dave, Arvind, Michael Pellauer
DAC
2003
ACM
14 years 8 months ago
Large-scale SOP minimization using decomposition and functional properties
In some cases, minimum Sum-Of-Products (SOP) expressions of Boolean functions can be derived by detecting decomposition and observing the functional properties such as unateness, ...
Alan Mishchenko, Tsutomu Sasao
DAC
1995
ACM
13 years 11 months ago
Rephasing: A Transformation Technique for the Manipulation of Timing Constraints
- We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs. Traditionally high-level synthesis systems for DSP have either ...
Miodrag Potkonjak, Mani B. Srivastava
DAC
2003
ACM
14 years 8 months ago
A cost-driven lithographic correction methodology based on off-the-shelf sizing tools
As minimum feature sizes continue to shrink, patterned features have become significantly smaller than the wavelength of light used in optical lithography. As a result, the requir...
Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, J...