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LCTRTS
1999
Springer
15 years 8 months ago
Effective Exploitation of a Zero Overhead Loop Buffer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanj...
ASPLOS
1998
ACM
15 years 8 months ago
Cache-Conscious Data Placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Brad Calder, Chandra Krintz, Simmi John, Todd M. A...
123
Voted
ISHPC
1997
Springer
15 years 8 months ago
Implementing Iterative Solvers for Irregular Sparse Matrix Problems in High Performance Fortran
Abstract. Writing e cient iterative solvers for irregular, sparse matrices in HPF is hard. The locality in the computations is unclear, and for e ciency we use storage schemes that...
Eric de Sturler, Damian Loher
127
Voted
EXPCS
2007
15 years 7 months ago
Analysis of input-dependent program behavior using active profiling
Utility programs, which perform similar and largely independent operations on a sequence of inputs, include such common applications as compilers, interpreters, and document parse...
Xipeng Shen, Michael L. Scott, Chengliang Zhang, S...
134
Voted
DATE
2004
IEEE
122views Hardware» more  DATE 2004»
15 years 7 months ago
Phase Coupled Code Generation for DSPs Using a Genetic Algorithm
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...
Markus Lorenz, Peter Marwedel