363 search results - page 54 / 73 » FPGA interconnect design using logical effort |
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...
SLIP
2003
ACM
14 years 24 days ago
2003
ACM
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
ARC
2010
Springer
13 years 5 months ago
2010
Springer
The SIMD parallel systems play a crucial role in the field of intensive signal processing. For most the parallel systems, communication networks are considered as one of the challe...
FAC
2007
13 years 7 months ago
2007
Abstract. The Verifying Compiler (VC) project proposals suggest that mainstream software developers are its targeted end-users. Like other software engineering efforts, the VC proj...
FCCM
1997
IEEE
13 years 11 months ago
1997
IEEE
The RAW benchmark suite consists of twelve programs designed to facilitate comparing, validating, and improving reconfigurable computing systems. These benchmarks run the gamut o...