363 search results - page 71 / 73 » FPGA interconnect design using logical effort |
DAC
1998
ACM
13 years 11 months ago
1998
ACM
Interconnect-driven optimization is an increasingly important step in high-performance design. Algorithms for buffer insertion have been successfully utilized to reduce delay in gl...
RTSS
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-pr...
CF
2010
ACM
14 years 17 days ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
VR
2002
IEEE
14 years 12 days ago
2002
IEEE
This paper focuses on the distributed architecture of the collaborative augmented reality system Studierstube. The system allows multiple users to experience a shared 3D workspace...
IUI
2012
ACM
12 years 3 months ago
2012
ACM
The effort and time required to develop user interface models has been one of the main limitations to the adoption of model-based approaches, which enable intelligent processing o...