87 search results - page 10 / 18 » FPGA technology mapping: a study of optimality |
ASPDAC
2004
ACM
14 years 27 days ago
2004
ACM
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...
FPGA
2010
ACM
14 years 4 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
BMCBI
2008
13 years 7 months ago
2008
Background: Association testing is a powerful tool for identifying disease susceptibility genes underlying complex diseases. Technological advances have yielded a dramatic increas...
ERSA
2006
13 years 9 months ago
2006
In this case study, various ways to partition a code between the microprocessor and FPGA are examined. Discrete image convolution operation with separable kernel is used as the ca...
FCCM
2002
IEEE
14 years 13 days ago
2002
IEEE
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...