Sciweavers

428 search results - page 77 / 86
» FPGA-Based SAT Solver
Sort
View
DATE
2008
IEEE
122views Hardware» more  DATE 2008»
14 years 2 months ago
Simulation-Directed Invariant Mining for Software Verification
With the advance of SAT solvers, transforming a software program to a propositional formula has generated much interest for bounded model checking of software in recent years. How...
Xueqi Cheng, Michael S. Hsiao
KBSE
2008
IEEE
14 years 2 months ago
Unit Testing of Flash Memory Device Driver through a SAT-Based Model Checker
Flash memory has become virtually indispensable in most mobile devices. In order for mobile devices to successfully provide services to users, it is essential that flash memory b...
Moonzoo Kim, Yunho Kim, Hotae Kim
MEMOCODE
2007
IEEE
14 years 1 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
ATVA
2007
Springer
108views Hardware» more  ATVA 2007»
14 years 1 months ago
A New Approach to Bounded Model Checking for Branching Time Logics
Abstract. Bounded model checking (BMC) is a technique for overcoming the state explosion problem which has gained wide industrial acceptance. Bounded model checking is typically ap...
Rotem Oshman, Orna Grumberg
CSCLP
2007
Springer
14 years 1 months ago
Quasi-Linear-Time Algorithms by Generalisation of Union-Find in CHR
Abstract. The union-find algorithm can be seen as solving simple equations between variables or constants. With a few lines of code change, we generalise its implementation in CHR...
Thom W. Frühwirth