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LCTRTS
1995
Springer
14 years 10 days ago
Verus: A Tool for Quantitative Analysis of Finite-State Real-Time Systems
Sérgio Vale Aguiar Campos, Edmund M. Clarke...
DAC
1991
ACM
14 years 10 days ago
A Unified Approach for the Synthesis of Self-Testable Finite State Machines
-Conventionallyself-test hardware is added after synthesis is completed. For highly sequential circuits like controllersthis design method eitherleads to high hardware overheadsor ...
Bernhard Eschermann, Hans-Joachim Wunderlich
ICCD
1991
IEEE
86views Hardware» more  ICCD 1991»
14 years 10 days ago
Synthesizing Converters Between Finite State Protocols
Janaki Akella, Kenneth L. McMillan