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ICCD
2003
IEEE
143views Hardware» more  ICCD 2003»
14 years 5 months ago
Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case
We analyze the effect of errors in branch predictors, a representative example of speculative processor subsystems, to motivate the necessity for fault tolerance in such subsystem...
Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris
COMPSAC
1996
IEEE
14 years 1 months ago
Applying Conventional Testing Techniques for Class Testing
This paper discusses how conventional testing criteria such as branch coverage can be applied for the testing of member functions inside a class. To support such testing technique...
In Sang Chung, Malcolm Munro, Wan Kwon Lee, Yong R...
EURODAC
1994
IEEE
110views VHDL» more  EURODAC 1994»
14 years 1 months ago
Symbolic exploration of large circuits with enhanced forward/backward traversals
Symbolic state space exploration techniques for Finite State Machines (FSMs) are a major recent result in CAD for VLSI. Most of them are exact and based on forward traversal, but ...
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
COLT
1992
Springer
14 years 1 months ago
On the Computational Power of Neural Nets
This paper deals with finite size networks which consist of interconnections of synchronously evolving processors. Each processor updates its state by applying a "sigmoidal&q...
Hava T. Siegelmann, Eduardo D. Sontag
ACSD
2007
IEEE
109views Hardware» more  ACSD 2007»
14 years 1 months ago
Efficient Automatic Resolution of Encoding Conflicts Using STG Unfoldings
Synthesis of asynchronous circuits from Signal Transition Graphs (STGs) involves resolution of state encoding conflicts by means of refining the STG specification. In this paper, ...
Victor Khomenko