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» Factoring large numbers with programmable hardware
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SAT
2004
Springer
102views Hardware» more  SAT 2004»
14 years 1 months ago
Derandomization of Schuler's Algorithm for SAT
Abstract. Recently Schuler [17] presented a randomized algorithm that solves SAT in expected time at most 2n(1−1/ log2(2m)) up to a polynomial factor, where n and m are, respecti...
Evgeny Dantsin, Alexander Wolpert
MICRO
2010
IEEE
146views Hardware» more  MICRO 2010»
13 years 5 months ago
The ZCache: Decoupling Ways and Associativity
The ever-increasing importance of main memory latency and bandwidth is pushing CMPs towards caches with higher capacity and associativity. Associativity is typically improved by in...
Daniel Sanchez, Christos Kozyrakis
FCCM
2006
IEEE
125views VLSI» more  FCCM 2006»
14 years 1 months ago
A Multithreaded Soft Processor for SoPC Area Reduction
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...
Blair Fort, Davor Capalija, Zvonko G. Vranesic, St...
SC
2005
ACM
14 years 1 months ago
Fault Tolerance Techniques for the Merrimac Streaming Supercomputer
As device scales shrink, higher transistor counts are available while soft-errors, even in logic, become a major concern. A new class of architectures, such as Merrimac and the IB...
Mattan Erez, Nuwan Jayasena, Timothy J. Knight, Wi...
APVIS
2007
13 years 9 months ago
Adaptive sampling in three dimensions for volume rendering on GPUs
Direct volume rendering of large volumetric data sets on programmable graphics hardware is often limited by the amount of available graphics memory and the bandwidth from main mem...
Martin Kraus, Magnus Strengert, Thomas Klein, Thom...