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» Factoring large numbers with programmable hardware
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PAM
2010
Springer
14 years 2 months ago
Network DVR: A Programmable Framework for Application-Aware Trace Collection
Network traces are essential for a wide range of network applications, including traffic analysis, network measurement, performance monitoring, and security analysis. Existing cap...
Chia-Wei Chang, Alexandre Gerber, Bill Lin, Subhab...
INFOSCALE
2006
ACM
14 years 1 months ago
Scalable hardware accelerator for comparing DNA and protein sequences
Abstract— Comparing genetic sequences is a well-known problem in bioinformatics. Newly determined sequences are being compared to known sequences stored in databases in order to ...
Philippe Faes, Bram Minnaert, Mark Christiaens, Er...
FPL
2004
Springer
154views Hardware» more  FPL 2004»
14 years 1 months ago
High Performance True Random Number Generator in Altera Stratix FPLDs
Abstract. The paper presents a high performance True Random Number Generator (TRNG) embedded in Altera Stratix Field Programmable Logic Devices (FPLDs). As a source of randomness, ...
Viktor Fischer, Milos Drutarovský, Martin S...
VC
2008
138views more  VC 2008»
13 years 7 months ago
A GPU-based light hierarchy for real-time approximate illumination
Illumination rendering including environment lighting, indirect illumination, and subsurface scattering plays for many graphics applications such as games and VR systems. However, ...
Hyunwoo Ki, Kyoungsu Oh
ISCA
2012
IEEE
224views Hardware» more  ISCA 2012»
11 years 10 months ago
A first-order mechanistic model for architectural vulnerability factor
Soft error reliability has become a first-order design criterion for modern microprocessors. Architectural Vulnerability Factor (AVF) modeling is often used to capture the probab...
Arun A. Nair, Stijn Eyerman, Lieven Eeckhout, Lizy...