Sciweavers

352 search results - page 45 / 71
» Fail-Awareness in Timed Asynchronous Systems
Sort
View
SAC
2009
ACM
14 years 3 months ago
Impact of NVRAM write cache for file system metadata on I/O performance in embedded systems
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...
In Hwan Doh, Hyo J. Lee, Young Je Moon, Eunsam Kim...
WDAG
2005
Springer
67views Algorithms» more  WDAG 2005»
14 years 2 months ago
What Can Be Implemented Anonymously?
Abstract. The vast majority of papers on distributed computing assume that processes are assigned unique identifiers before computation begins. But is this assumption necessary? W...
Rachid Guerraoui, Eric Ruppert
MICRO
1992
IEEE
124views Hardware» more  MICRO 1992»
14 years 24 days ago
A shape matching approach for scheduling fine-grained parallelism
- We present a compilation technique for scheduling parallelism on fine grained asynchronous MIMD systems. The shape scheduling algorithm is introduced that utilizes the flexibilit...
Brian A. Malloy, Rajiv Gupta, Mary Lou Soffa
FPGA
2010
ACM
182views FPGA» more  FPGA 2010»
13 years 6 months ago
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
Doris Chen, Deshanand Singh, Jeffrey Chromczak, Da...
TVLSI
2010
13 years 3 months ago
A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
Zhiyi Yu, Bevan M. Baas