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HIPEAC
2007
Springer
14 years 1 months ago
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
Sonia López, Steve Dropsho, David H. Albone...
FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
13 years 12 months ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk
CASES
2001
ACM
13 years 11 months ago
Storage allocation for embedded processors
In an embedded system, it is common to have several memory areas with different properties, such as access time and size. An access to a specific memory area is usually restricted...
Jan Sjödin, Carl von Platen
ICCAD
2009
IEEE
147views Hardware» more  ICCAD 2009»
13 years 5 months ago
SAT-based protein design
Computational protein design can be formulated as an optimization problem, where the objective is to identify the sequence of amino acids that minimizes the energy of a given prot...
Noah Ollikainen, Ellen Sentovich, Carlos Coelho, A...
BMCBI
2011
12 years 11 months ago
Elastic SCAD as a novel penalization method for SVM classification tasks in high-dimensional data
Background: Classification and variable selection play an important role in knowledge discovery in highdimensional data. Although Support Vector Machine (SVM) algorithms are among...
Natalia Becker, Grischa Toedt, Peter Lichter, Axel...