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IEEEPACT
1998
IEEE
14 years 2 months ago
Optimistic Register Coalescing
Register coalescing is used, as part of register allocation, to reduce the number of register copies. Developing efficient register coalescing heuristics is particularly important ...
Jinpyo Park, Soo-Mook Moon
CC
2003
Springer
114views System Software» more  CC 2003»
14 years 3 months ago
Combined Code Motion and Register Allocation Using the Value State Dependence Graph
We define the Value State Dependence Graph (VSDG). The VSDG is a form of the Value Dependence Graph (VDG) extended by the addition of state dependence edges to model sequentialise...
Neil Johnson, Alan Mycroft
DATE
2009
IEEE
101views Hardware» more  DATE 2009»
14 years 4 months ago
Static analysis to mitigate soft errors in register files
—With continuous technology scaling, soft errors are becoming an increasingly important design concern even for earth-bound applications. While compiler approaches have the poten...
Jongeun Lee, Aviral Shrivastava
EUROCAST
2005
Springer
166views Hardware» more  EUROCAST 2005»
14 years 3 months ago
A New Pseudo-Random Generator Based on Gollmann Cascades of Baker-Register-Machines
In this paper, we present a new pseudo-random sequence generator, constructed by the generalized discrete Baker transformation. This new generator is called Cascaded Baker Register...
Dominik Jochinger, Franz Pichler
WCRE
2002
IEEE
14 years 2 months ago
Register Liveness Analysis for Optimizing Dynamic Binary Translation
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
Mark Probst, Andreas Krall, Bernhard Scholz