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ISCA
2002
IEEE
82views Hardware» more  ISCA 2002»
14 years 2 months ago
Increasing Processor Performance by Implementing Deeper Pipelines
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper will explore the relationship between ...
Eric Sprangle, Doug Carmean
AGENTS
2001
Springer
14 years 2 months ago
Automatically tracking and analyzing the behavior of live insect colonies
We introduce the study of live social insect colonies as a relevant and exciting domain for the development and application of multi-agent systems modeling tools. Social insects p...
Tucker R. Balch, Zia Khan, Manuela M. Veloso
ARITH
1999
IEEE
14 years 1 months ago
Reduced Latency IEEE Floating-Point Standard Adder Architectures
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
Andrew Beaumont-Smith, Neil Burgess, S. Lefrere, C...
ICC
1997
IEEE
108views Communications» more  ICC 1997»
14 years 1 months ago
Overflow Probability in an ATM Queue with Self-Similar Input Traffic
Real measurements in high-speed communications networks have recently shown that traffic may demonstrate properties of long-range dependency peculiar to self-similar stochastic pr...
Boris Tsybakov, Nicolas D. Georganas
ARCS
2006
Springer
14 years 1 months ago
Efficient System-on-Chip Energy Management with a Segmented Bloom Filter
As applications tend to grow more complex and use more memory, the demand for cache space increases. Thus embedded processors are inclined to use larger caches. Predicting a miss i...
Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien...