1054 search results - page 13 / 211 » Fast Simulation Techniques for Design Space Exploration |
SIGCSE
2006
ACM
14 years 3 months ago
2006
ACM
Visualization and interactivity are valuable active learning techniques that can improve mastery of difficult concepts. In this paper we describe jFAST, an easy-to-use graphical s...
NOCS
2007
IEEE
14 years 4 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
SIES
2007
IEEE
14 years 4 months ago
2007
IEEE
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
VLSISP
2008
13 years 9 months ago
2008
ion of Abstract Performance Models for System-Level Design Space Exploration ANDY D. PIMENTEL, MARK THOMPSON, SIMON POLSTRA AND CAGKAN ERBAS Computer Systems Architecture Group, In...
ISSS
1997
IEEE
14 years 1 months ago
1997
IEEE
Embedded processor-based systems allow for the tailoring of the on-chip memory architecture based on application-specific requirements. We present an analytical strategy for explo...