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INFOCOM
2002
IEEE
14 years 17 days ago
Efficient Hardware Architecture for Fast IP Address Lookup
 A multigigabit IP router may receive several millions packets per second from each input link. For each packet, the router needs to find the longest matching prefix in the forw...
Derek C. W. Pao, Angus Wu, Cutson Liu, Kwan Lawren...
GLVLSI
2002
IEEE
127views VLSI» more  GLVLSI 2002»
14 years 18 days ago
A new look at hardware maze routing
This paper describes a new design for a hardware accelerator to support grid-based Maze Routing. Based on the direct mapped approach of Breuer and Shamsa [3], this work refines th...
John A. Nestor
FPL
1994
Springer
170views Hardware» more  FPL 1994»
13 years 11 months ago
A Fast FPGA Implementation of a General Purpose Neuron
The implementation of larger digital neural networks has not been possible due to the real-estate requirements of single neurons. We present an expandable digital architecture whic...
Valentina Salapura, Michael Gschwind, Oliver Maisc...
CONEXT
2008
ACM
13 years 9 months ago
Trellis: a platform for building flexible, fast virtual networks on commodity hardware
We describe Trellis, a platform for hosting virtual networks on shared commodity hardware. Trellis allows each virtual network to define its own topology, control protocols, and f...
Sapan Bhatia, Murtaza Motiwala, Wolfgang Mühl...
RTCSA
2007
IEEE
14 years 1 months ago
Fast Schedulability Analysis Using Commodity Graphics Hardware
In this paper we explore the possibility of using commodity graphics processing units (GPUs) to speedup standard schedulability analysis algorithms. Our long-term goal is to explo...
Jimin Feng, Samarjit Chakraborty, Bertil Schmidt, ...