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» Fast Template Placement for Reconfigurable Computing Systems
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DAC
2005
ACM
14 years 8 months ago
Architecture-adaptive range limit windowing for simulated annealing FPGA placement
Previous research has shown both theoretically and practically that simulated annealing can greatly benefit from the incorporation of an adaptive range limiting window to control ...
Kenneth Eguro, Scott Hauck, Akshay Sharma
IEEESCC
2007
IEEE
14 years 2 months ago
Intelligent Document Gateway - A Ser vice System Analysis
In today’s fast paced world, it is necessary to process business documents expediently, accurately, and diligently. In other words, processing has to be fast, errors must be pre...
Vikas Krishna, John Bailey, Ana Lelescu
MAM
2006
95views more  MAM 2006»
13 years 7 months ago
Stochastic spatial routing for reconfigurable networks
FPGA placement and routing is time consuming, often serving as the major obstacle inhibiting a fast edit-compile-test loop in prototyping and development and the major obstacle pr...
André DeHon, Randy Huang, John Wawrzynek
CASES
2006
ACM
13 years 11 months ago
Incremental elaboration for run-time reconfigurable hardware designs
We present a new technique for compiling run-time reconfigurable hardware designs. Run-time reconfigurable embedded systems can deliver promising benefits over implementations in ...
Arran Derbyshire, Tobias Becker, Wayne Luk
IPPS
1999
IEEE
14 years 4 days ago
Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System
The known fast sequential algorithms for multiplying two N N matrices (over an arbitrary ring) have time complexity ON , where 2 3. The current best value of is less than 2.3755....
Keqin Li, Victor Y. Pan