195 search results - page 3 / 39 » Fault Analysis of DPA-Resistant Algorithms |
HPCC
2007
Springer
14 years 1 months ago
2007
Springer
Currently, some coarse measures like global network latency are used to compare routing protocols. These measures do not provide enough insight of traffic distribution among networ...
ATVA
2007
Springer
14 years 1 months ago
2007
Springer
Fault tree analysis is a traditional and well-established technique for analyzing system design and robustness. Its purpose is to identify sets of basic events, called cut sets, wh...
SPAA
1996
ACM
13 years 11 months ago
1996
ACM
In this paper, we analyze the performance of parallel multithreaded algorithms that use dag-consistent distributed shared memory. Specifically, we analyze execution time, page fau...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
FDTC
2006
Springer
13 years 11 months ago
2006
Springer