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» Fault Detection Effectiveness of Spathic Test Data
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ET
2007
119views more  ET 2007»
13 years 8 months ago
Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits
In this paper, we present an exhaustive study on the influence of resistive-open defects in pre-charge circuits of SRAM memories. In SRAM memories, the pre-charge circuits operate...
Luigi Dilillo, Patrick Girard, Serge Pravossoudovi...
EURODAC
1995
IEEE
137views VHDL» more  EURODAC 1995»
14 years 10 days ago
A formal non-heuristic ATPG approach
This paper presents a formal approach to test combinational circuits. For the sake of explanation we describe the basic algorithms with the help of the stuck–at fault model. Ple...
Manfred Henftling, Hannes C. Wittmann, Kurt Antrei...
SIGPLAN
2002
13 years 8 months ago
Embedding built-in tests in hot spots of an object-oriented framework
: Object-oriented frameworks require thorough testing as they are intended to be reused repeatedly in developing numerous applications. Moreover, whenever a framework is extended f...
Taewoong Jeon, Hyonwoo Seung, Sungyoung Lee
VTS
1997
IEEE
86views Hardware» more  VTS 1997»
14 years 1 months ago
Methods to reduce test application time for accumulator-based self-test
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
Albrecht P. Stroele, Frank Mayer
ITC
1996
IEEE
127views Hardware» more  ITC 1996»
14 years 29 days ago
Altering a Pseudo-Random Bit Sequence for Scan-Based BIST
This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
Nur A. Touba, Edward J. McCluskey