327 search results - page 11 / 66 » Fault emulation: a new approach to fault grading |
ICFEM
2009
Springer
13 years 5 months ago
2009
Springer
In this paper we continue the study of a strict extension of the Computation Tree Logic, called graded-CTL, recently introduced by the same authors. This new logic augments the sta...
WISES
2004
13 years 9 months ago
2004
-- Debugging software that runs on highly integrated System-on-Chip devices is complicated because conventional debug tools (like traditional In-Circuit Emulators and Logic Analyze...
MTDT
2000
IEEE
14 years 9 days ago
2000
IEEE
A new approach to diagnostic testing of embedded memories is presented which enables the design of tests that provide complete detection and distinguishing of all faults in a give...
ISSRE
2003
IEEE
14 years 1 months ago
2003
IEEE
Partition testing is a well-known software testing technique. This paper shows that partition testing strategies are relatively ineffective in detecting faults related to small sh...
VTS
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper presents a new approach for on-chip test pattern generation. The set of test patterns generated by a pseudo-random pattern generator (e.g., an LFSR) is transformed into...