Sciweavers

535 search results - page 56 / 107
» Fault tolerant high performance computing by a coding approa...
Sort
View
MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
14 years 2 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee
IPPS
2009
IEEE
14 years 2 months ago
Annotation-based empirical performance tuning using Orio
In many scientific applications, significant time is spent tuning codes for a particular highperformance architecture. Tuning approaches range from the relatively nonintrusive (...
Albert Hartono, Boyana Norris, Ponnuswamy Sadayapp...
DSN
2006
IEEE
13 years 11 months ago
An Approach for Detecting and Distinguishing Errors versus Attacks in Sensor Networks
Distributed sensor networks are highly prone to accidental errors and malicious activities, owing to their limited resources and tight interaction with the environment. Yet only a...
Claudio Basile, Meeta Gupta, Zbigniew Kalbarczyk, ...
DCC
2005
IEEE
14 years 7 months ago
Efficient Inter-Band Prediction and Wavelet Based Compression for Hyperspectral Imagery: A Distributed Source Coding Approach
Hyperspectral images have correlation at the level of pixels; moreover, images from neighboring frequency bands are also closely correlated. In this paper, we propose to use distr...
Caimu Tang, Ngai-Man Cheung, Antonio Ortega, Cauli...
IEEEPACT
2002
IEEE
14 years 19 days ago
Eliminating Exception Constraints of Java Programs for IA-64
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komats...