535 search results - page 8 / 107 » Fault tolerant high performance computing by a coding approa... |
ICPADS
1994
IEEE
1994
IEEE
Efficient Fault Tolerance: An Approach to Deal with Transient Faults in Multiprocessor Architectures
13 years 11 months ago
Dynamic error processing approaches are an important mechanism to increase the reliability in a multiprocessor system, while making efficient use of the available resources. To th...
HPDC
2009
IEEE
14 years 2 months ago
2009
IEEE
Long running High Performance Computing (HPC) applications at scale must be able to tolerate inevitable faults if they are to harness current and future HPC systems. Message Passi...
DFT
2003
IEEE
14 years 26 days ago
2003
IEEE
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Hypervisor-based fault tolerance (HBFT), a checkpoint-recovery mechanism, is an emerging approach to sustaining mission-critical applications. Based on virtualization technology, H...