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» Features of Future Network Processor Architectures
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HPCA
2002
IEEE
14 years 8 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder
SIGADA
2001
Springer
14 years 2 days ago
Targeting Ada95/DSA for distributed simulation of multiprotocol communication networks
The last years have seen an increasing, albeit restricted simulation of large-scale networks on shared memory parallel platforms. As the complexity of communication protocols and ...
Dhavy Gantsou
DAGSTUHL
2003
13 years 9 months ago
Policies: Giving Users Control over Calls
Abstract. Features provide extensions to a basic service, but in new systems users require much greater flexibility oriented towards their needs. Traditional features do not easil...
Stephan Reiff-Marganiec
ISCA
2011
IEEE
365views Hardware» more  ISCA 2011»
12 years 11 months ago
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...
SECRYPT
2010
214views Business» more  SECRYPT 2010»
13 years 5 months ago
Nanonetworks - A New Frontier in Communications
Nanotechnology is enabling the development of devices in a scale ranging from one to a few one hundred nanometers. Nanonetworks, i.e., the interconnection of nano-scale devices, a...
Ian F. Akyildiz