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» Features of Future Network Processor Architectures
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CLUSTER
2009
IEEE
14 years 10 days ago
A scalable and generic task scheduling system for communication libraries
Abstract—Since the advent of multi-core processors, the physionomy of typical clusters has dramatically evolved. This new massively multi-core era is a major change in architectu...
François Trahay, Alexandre Denis
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
14 years 1 months ago
A multi-core debug platform for NoC-based systems
Network-on-Chip (NoC) is generally regarded as the most promising solution for the future on-chip communication scheme in gigascale integrated circuits. As traditional debug archi...
Shan Tang, Qiang Xu
ICPP
1993
IEEE
13 years 11 months ago
Scalability Study of the KSR-1
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...
SIAMCOMP
2000
118views more  SIAMCOMP 2000»
13 years 7 months ago
Constructive, Deterministic Implementation of Shared Memory on Meshes
This paper describes a scheme to implement a shared address space of size m on an n-node mesh, with m polynomial in n, where each mesh node hosts a processor and a memory module. A...
Andrea Pietracaprina, Geppino Pucci, Jop F. Sibeyn
IPTPS
2004
Springer
14 years 1 months ago
P6P: A Peer-to-Peer Approach to Internet Infrastructure
Abstract— P6P is a new, incrementally deployable networking infrastructure that resolves the growing tensions between the Internet routing infrastructure and the end sites of the...
Lidong Zhou, Robbert van Renesse