Sciweavers

41 search results - page 7 / 9
» Fetch Directed Instruction Prefetching
Sort
View
PLDI
2005
ACM
14 years 1 months ago
Code placement for improving dynamic branch prediction accuracy
Code placement techniques have traditionally improved instruction fetch bandwidth by increasing instruction locality and decreasing the number of taken branches. However, traditio...
Daniel A. Jiménez
ISCA
2007
IEEE
90views Hardware» more  ISCA 2007»
14 years 1 months ago
Transparent control independence (TCI)
AL-ZAWAWI, AHMED SAMI. Transparent Control Independence (TCI). (Under the direction of Dr. Eric Rotenberg). Superscalar architectures have been proposed that exploit control indep...
Ahmed S. Al-Zawawi, Vimal K. Reddy, Eric Rotenberg...
HPCA
2001
IEEE
14 years 7 months ago
Speculative Data-Driven Multithreading
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
Amir Roth, Gurindar S. Sohi
CC
2009
Springer
153views System Software» more  CC 2009»
14 years 8 months ago
Register Spilling and Live-Range Splitting for SSA-Form Programs
Register allocation decides which parts of a variable's live range are held in registers and which in memory. The compiler inserts spill code to move the values of variables b...
Matthias Braun, Sebastian Hack
ISCA
2002
IEEE
159views Hardware» more  ISCA 2002»
14 years 12 days ago
Avoiding Initialization Misses to the Heap
This paper investigates a class of main memory accesses (invalid memory traffic) that can be eliminated altogether. Invalid memory traffic is real data traffic that transfers inva...
Jarrod A. Lewis, Mikko H. Lipasti, Bryan Black