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VLSID
1993
IEEE
133views VLSI» more  VLSID 1993»
13 years 11 months ago
An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters
An area-eficzent systolic architecture for realtime, programmable-coeBcient jinite impulse response (FIR)filters is presented. A technique called pipelined clustering is introduce...
V. Visvanathan, Nibedita Mohanty, S. Ramanathan
JUCS
2007
126views more  JUCS 2007»
13 years 7 months ago
Accepting Networks of Evolutionary Processors with Filtered Connections
: In this paper we simplify a recent model of computation considered in [Margenstern et al. 2005], namely accepting network of evolutionary processors, by moving the filters from ...
Cezara Dragoi, Florin Manea, Victor Mitrana
ICASSP
2011
IEEE
12 years 11 months ago
Robust Bayesian Analysis applied to Wiener filtering of speech
Commonly used speech enhancement algorithms estimate the power spectral density of the noise to be removed, or make a decision about the presence of speech in a particular frame, ...
Phil Spencer Whitehead, David V. Anderson
ICASSP
2011
IEEE
12 years 11 months ago
Theoretical analysis of musical noise in Wiener filtering family via higher-order statistics
Recently, one of the authors has reported that the amount of generated musical noise is strongly correlated with higher-order statistics of the power spectra. On the basis of this...
Takayuki Inoue, Hiroshi Saruwatari, Kiyohiro Shika...
IEEEPACT
2005
IEEE
14 years 1 months ago
Trace Cache Sampling Filter
This paper presents a new technique for efficient usage of small trace caches. A trace cache can significantly increase the performance of wide out-oforder processors, but to be e...
Michael Behar, Avi Mendelson, Avinoam Kolodny