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» Finding latent performance bugs in systems implementations
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CODES
2007
IEEE
14 years 2 months ago
Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
Paul Pop, Kåre Harbo Poulsen, Viacheslav Izo...
MOBICOM
1996
ACM
13 years 12 months ago
Reducing Processor Power Consumption by Improving Processor Time Management in a Single-user Operating System
The CPU is one of the major power consumers in a portable computer, and considerable power can be saved by turning off the CPU when it is not doing useful work. In Apple's Ma...
Jacob R. Lorch, Alan Jay Smith
TCAD
2010
160views more  TCAD 2010»
13 years 2 months ago
SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips
Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient netwo...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
ATAL
2008
Springer
13 years 9 months ago
Physical parameter optimization in swarms of ultra-low complexity agents
Physical agents (such as wheeled vehicles, UAVs, hovercraft, etc.) with simple control systems are often sensitive to changes in their physical design and control parameters. As s...
Ryan Connaughton, Paul W. Schermerhorn, Matthias S...
APCSAC
2004
IEEE
13 years 11 months ago
Continuous Adaptive Object-Code Re-optimization Framework
Dynamic optimization presents opportunities for finding run-time bottlenecks and deploying optimizations in statically compiled programs. In this paper, we discuss our current impl...
Howard Chen, Jiwei Lu, Wei-Chung Hsu, Pen-Chung Ye...