103 search results - page 19 / 21 » Fine-grained power management for multithreaded processor co... |
RTSS
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-pr...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem...
CODES
2001
IEEE
13 years 11 months ago
2001
IEEE
In this paper, we explore a hybrid global/local search optimization framework for dynamic voltage scaling in embedded multiprocessor systems. The problem is to find, for a multipr...
DSD
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we propose an IPSec implementation on Xilinx Virtex-II Pro FPGA1 . We move the key management and negotiation into software function calls that run on the PowerPC p...