104 search results - page 6 / 21 » First-Class Synchronization Barriers |
ICPP
1995
IEEE
13 years 11 months ago
1995
IEEE
Software barriers have been designed and evaluated for barrier synchronization in large-scale shared-memory multiprocessors, under the assumption that all processorsreach the sync...
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve sys...
POPL
2009
ACM
14 years 2 months ago
2009
ACM
Speculative execution is an important technique that has historically been used to extract concurrency from sequential programs. While techniques to support speculation work well ...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
ICPPW
2005
IEEE
14 years 1 months ago
2005
IEEE
Large–scale parallel applications performing global synchronization may spend a significant amount of execution time waiting for the completion of a barrier operation. Conseque...