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» Fixed-Polynomial Size Circuit Bounds
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APPROX
2010
Springer
120views Algorithms» more  APPROX 2010»
13 years 9 months ago
Uniform Derandomization from Pathetic Lower Bounds
A recurring theme in the literature on derandomization is that probabilistic algorithms can be simulated quickly by deterministic algorithms, if one can obtain impressive (i.e., s...
Eric Allender, Vikraman Arvind, Fengming Wang
IPL
2010
82views more  IPL 2010»
13 years 6 months ago
New upper bounds on the Boolean circuit complexity of symmetric functions
In this note, we present improved upper bounds on the circuit complexity of symmetric Boolean functions. In particular, we describe circuits of size 4.5n + o(n) for any symmetric ...
E. Demenkov, Arist Kojevnikov, Alexander S. Kuliko...
CRYPTO
2012
Springer
262views Cryptology» more  CRYPTO 2012»
11 years 10 months ago
Functional Encryption with Bounded Collusions via Multi-party Computation
We construct a functional encryption scheme secure against an a-priori bounded polynomial number of collusions for the class of all polynomial-size circuits. Our constructions req...
Sergey Gorbunov, Vinod Vaikuntanathan, Hoeteck Wee
ISPD
1997
ACM
142views Hardware» more  ISPD 1997»
13 years 12 months ago
Minimization of chip size and power consumption of high-speed VLSI buffers
In this paper, we study optimal bu er design in high-performance VLSI systems. Speci cally, we design a bu er for a given load such that chip area and power dissipation are minima...
D. Zhou, X. Y. Liu
CSR
2008
Springer
13 years 9 months ago
Cracks in the Defenses: Scouting Out Approaches on Circuit Lower Bounds
Razborov and Rudich identified an imposing barrier that stands in the way of progress toward the goal of proving superpolynomial lower bounds on circuit size. Their work on "n...
Eric Allender