107 search results - page 7 / 22 » Fixed-Polynomial Size Circuit Bounds |
STOC
1996
ACM
13 years 11 months ago
1996
ACM
We study the complexity of computing Boolean functions using AND, OR and NOT gates. We show that a circuit of depth d with S gates can be made to output a constant by setting O(S1...
FCT
2005
Springer
14 years 1 months ago
2005
Springer
We prove optimal lower bounds for multilinear circuits and for monotone circuits with bounded depth. These lower bounds state that, in order to compute certain functions, these cir...
ISAAC
2007
Springer
14 years 1 months ago
2007
Springer
This paper shows that it is NP-hard to generate a minimum complete test set for stuck-at faults on the wires of a reversible circuit. We also show non-trivial lower bounds for the ...
FOCS
2007
IEEE
13 years 11 months ago
2007
IEEE
We develop a new technique of proving lower bounds for the randomized communication complexity of boolean functions in the multiparty `Number on the Forehead' model. Our meth...
TCAD
2010
13 years 2 months ago
2010
Design debugging is a major bottleneck in modern VLSI design flows as both the design size and the length of the error trace contribute to its inherent complexity. With typical des...