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ISSS
2000
IEEE
91views Hardware» more  ISSS 2000»
14 years 28 days ago
Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral Cores
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
Tony Givargis, Frank Vahid, Jörg Henkel
OOPSLA
2010
Springer
13 years 7 months ago
Cross-language, type-safe, and transparent object sharing for co-located managed runtimes
As software becomes increasingly complex and difficult to analyze, it is more and more common for developers to use high-level, type-safe, object-oriented (OO) programming langua...
Michal Wegiel, Chandra Krintz
ANSS
2005
IEEE
14 years 2 months ago
J-Sim: A Simulation Environment for Wireless Sensor Networks
Wireless Sensor Networks (WSNs) have gained considerable attention in the past few years. As such, there has been an increasing need for defining and developing simulation framew...
Ahmed Sobeih, Wei-Peng Chen, Jennifer C. Hou, Lu-C...
GLVLSI
2008
IEEE
137views VLSI» more  GLVLSI 2008»
14 years 3 months ago
Phase-based cache reconfiguration for a highly-configurable two-level cache hierarchy
Phase-based tuning methodologies specialize system parameters for each application phase of execution. Parameters are varied during execution, as opposed to remaining fixed as in ...
Ann Gordon-Ross, Jeremy Lau, Brad Calder
GECCO
2006
Springer
180views Optimization» more  GECCO 2006»
14 years 6 days ago
Improving cooperative GP ensemble with clustering and pruning for pattern classification
A boosting algorithm based on cellular genetic programming to build an ensemble of predictors is proposed. The method evolves a population of trees for a fixed number of rounds an...
Gianluigi Folino, Clara Pizzuti, Giandomenico Spez...