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TII
2010
146views Education» more  TII 2010»
13 years 2 months ago
A Flexible Design Flow for Software IP Binding in FPGA
Software intellectual property (SWIP) is a critical component of increasingly complex field programmable gate arrays (FPGA)-based system-on-chip (SOC) designs. As a result, develop...
Michael A. Gora, Abhranil Maiti, Patrick Schaumont
ERSA
2004
129views Hardware» more  ERSA 2004»
13 years 9 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
13 years 11 months ago
Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding
In this paper, we explore the requirements of emerging complex SoC's and describe StepNP, an experimental flexible, multi-processor SoC platform targeted towards communicatio...
Pierre G. Paulin, Chuck Pilkington, Essaid Bensoud...
TPDS
2010
166views more  TPDS 2010»
13 years 2 months ago
Configurable Middleware for Distributed Real-Time Systems with Aperiodic and Periodic Tasks
Different distributed real-time systems (DRS) must handle aperiodic and periodic events under diverse sets of requirements. While existing middleware such as Real-Time CORBA has sh...
Yuanfang Zhang, Christopher D. Gill, Chenyang Lu
VLSISP
2010
119views more  VLSISP 2010»
13 years 2 months ago
Hardware Acceleration of HMMER on FPGAs
We propose a new parallelization scheme for the hmmsearch function of the HMMER software, in order to target FPGA technology. hmmsearch is a very compute intensive software for bio...
Steven Derrien, Patrice Quinton