1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinge...
From the perspective of flow analysis, the more complex the project, the more wastes are prone to build up, due to the increasing number of interfaces between activities. When pro...
Abstract—On-chip power density and temperature are rising exponentially with decreasing feature sizes. This alarming trend calls for temperature management at every level of syst...
In this paper we consider the problem of nding a core of limited length in a tree. A core is a path, which minimizes the sum of the distances to all nodes in the tree. This proble...
Stephen Alstrup, Peter W. Lauridsen, Peer Sommerlu...
Given a spatio-temporal network (ST network) whose edge properties vary with time, a time-sub-interval minimum spanning tree (TSMST) is a collection of distinct minimum spanning t...