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» Formal Development of Reactive Fault Tolerant Systems
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FPGA
2003
ACM
117views FPGA» more  FPGA 2003»
14 years 27 days ago
Reducing pin and area overhead in fault-tolerant FPGA-based designs
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz...
EH
2005
IEEE
127views Hardware» more  EH 2005»
14 years 1 months ago
On the Robustness Achievable with Stochastic Development Processes
Manufacturing processes are a key source of faults in complex hardware systems. Minimizing this impact of manufacturing uncertainties is one way towards achieving fault tolerant s...
Shivakumar Viswanathan, Jordan B. Pollack
PDP
1996
IEEE
13 years 11 months ago
Application-Dependent Performability Evaluation of Fault-Tolerant Multiprocessors
A case study of performance and dependability evaluation of fault-tolerant multiprocessors is presented. Two specific architectures are analyzed taking into account system functio...
Stefan Dalibor, A. Hein, Wolfgang Hohl
SRDS
1998
IEEE
13 years 11 months ago
A Metaobject Protocol for Fault-Tolerant CORBA Applications
Abstract: The use of meta-level architectures for the implementation of faulttolerant systems is today very appealing. Nevertheless, all existing fault-tolerant systems based on th...
Marc-Olivier Killijian, Jean-Charles Fabre, Juan-C...
KBSE
2007
IEEE
14 years 1 months ago
Iterative model-driven development of adaptable service-based applications
Flexibility and interoperability make web services well suited for designing highly-customizable reactive service-based applications, that is interactive applications that can be ...
Leen Lambers, Hartmut Ehrig, Leonardo Mariani, Mau...