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» Formal Modeling of Communication Traces
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ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
14 years 4 months ago
Formal model of data reuse analysis for hierarchical memory organizations
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
SIAMCOMP
2002
90views more  SIAMCOMP 2002»
13 years 7 months ago
A Virtually Synchronous Group Multicast Algorithm for WANs: Formal Approach
This paper presents a formal design for a novel group communication service targeted for WANs. The service provides Virtual Synchrony semantics. Such semantics facilitate the desi...
Idit Keidar, Roger Khazan
PPOPP
2009
ACM
14 years 8 months ago
Formal verification of practical MPI programs
This paper considers the problem of formal verification of MPI programs operating under a fixed test harness for safety properties without building verification models. In our app...
Anh Vo, Sarvani S. Vakkalanka, Michael Delisi, Gan...
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 4 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
ICDCSW
2000
IEEE
13 years 11 months ago
Compositional Verification of a Third Generation Mobile Communication Protocol
Model-checking has turned out to be an efficient and relatively easy-to-use technique in the verification of formally described programs. However, there is one major drawback in u...
Sari Leppänen, Matti Luukkainen