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HYBRID
2010
Springer
13 years 9 months ago
Receding horizon control for temporal logic specifications
In this paper, we describe a receding horizon scheme that satisfies a class of linear temporal logic specifications sufficient to describe a wide range of properties including saf...
Tichakorn Wongpiromsarn, Ufuk Topcu, Richard M. Mu...
QEST
2010
IEEE
13 years 5 months ago
DTMC Model Checking by SCC Reduction
Discrete-Time Markov Chains (DTMCs) are a widely-used formalism to model probabilistic systems. On the one hand, available tools like PRISM or MRMC offer efficient model checking a...
Erika Ábrahám, Nils Jansen, Ralf Wim...
FASE
2008
Springer
13 years 9 months ago
A Model Checking Approach for Verifying COWS Specifications
We introduce a logical verification framework for checking functional properties of service-oriented applications formally specified using the service specification language COWS. ...
Alessandro Fantechi, Stefania Gnesi, Alessandro La...
FMSD
2010
123views more  FMSD 2010»
13 years 6 months ago
Analog property checkers: a DDR2 case study
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits S. Little and C. Myers (University of Utah, USA) Monday, July 14, 14:00-17:00 4 14:00-14:40 fSpic...
Kevin D. Jones, Victor Konrad, Dejan Nickovic
FMCAD
2006
Springer
13 years 11 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar