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ICFEM
1997
Springer
14 years 17 days ago
Formally Specifying and Verifying Real-Time Systems
A real-time computer system is a system that must perform its functions within specified time bounds. These systems are generally characterized by complex interactions with the en...
Richard A. Kemmerer
ICSE
1999
IEEE-ACM
14 years 21 days ago
A Practical Method for Verifying Event-Driven Software
Formal verification methods are used only sparingly in software development. The most successful methods to date are based on the use of model checking tools. To use such he user ...
Gerard J. Holzmann, Margaret H. Smith
DATE
2005
IEEE
164views Hardware» more  DATE 2005»
14 years 2 months ago
Automated Synthesis of Assertion Monitors using Visual Specifications
Automated synthesis of monitors from high-level properties plays a significant role in assertion-based verification. We present here a methodology to synthesize assertion monitors...
Ambar A. Gadkari, S. Ramesh
SEKE
1995
Springer
13 years 12 months ago
Visual Scenarios for Validation of Requirements Specification
The development of a large information system is generally regarded as one of the most complex activities undertaken by organizations and it is dependent on the communication and u...
V. Lalioti, Babis Theodoulidis
HCI
2009
13 years 6 months ago
High-Fidelity Prototyping of Interactive Systems Can Be Formal Too
The design of safety critical systems calls for advanced software engineering models, methods and tools in order to meet the safety requirements that will avoid putting human life ...
Philippe A. Palanque, Jean-François Ladry, ...