67 search results - page 12 / 14 » Formal Verification of Digital Circuits Using Symbolic Terna... |
ECMDAFA
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. The Unified Modelling Language (UML) is intended to describe systems, but it is not clear what systems satisfy a given collection of UML diagrams. Stephen Mellor has desc...
FDL
2004
IEEE
13 years 11 months ago
2004
IEEE
System-on-Chip (SOC) and other complex distributed hardware/software systems contain heterogeneous components such as DSPs, micro-controllers, application specific logic etc., whi...
SIGSOFT
2003
ACM
14 years 8 months ago
2003
ACM
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...
TSE
2008
13 years 7 months ago
2008
We propose an interface specification language based on grammars for modular software model checking. In our interface specification language, component interfaces are specified a...
POPL
2005
ACM
14 years 8 months ago
2005
ACM
While a typical software component has a clearly specified (static) interface in terms of the methods and the input/output types they support, information about the correct sequen...